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WIRELESS COMMUNICATIONS DIVISION
C2
Control Logic C2
L1
TQ3132
DATA SHEET
VDD
GND
GND
RF IN
RF 50 ohm OUT RF Out Control Logic
Low Current, 3V Cellular Band CDMA/AMPS LNA IC
GND
C3
Features
Small size: SOT23-8 Single 3V operation
Product Description
The TQ3132 is a low current, 3V, RF LNA IC designed specifically for Cellular band CDMA/AMPS applications. It's RF performance meets the requirements of products designed to the IS-95 and AMPS standards. The TQ3132 is designed to be used with the TQ5131 or TQ5132 (CDMA/AMPS mixer) which provides a complete CDMA receiver for 800MHz dual-mode phones. The LNA incorporates on-chip switches which determine CDMA, AMPS, and bypass mode select. When used with the TQ5131 or TQ5132 (CDMA RFA/mixer), four gain states are available. The RF output port is internally matched to 50 , greatly simplifying the design and keeping the number of external components to a minimum. The TQ3132 achieves good RF performance with low current consumption, supporting long standby times in portable applications. Coupled with the very small SOT23-8 package, the part is ideally suited for Cellular band mobile phones. Electrical Specifications1
Min 832 13.0 1.4 8.0 7.5 3rd Order Intercept Typ Max 894 Units MHz dB dB dBm mA
Low-current operation Gain Select Mode Select High IP3 performance Few external components 50 Output
Applications
IS-95 CDMA Mobile Phones AMPS Mobile Phones Dual Mode CDMA Cellular applications 832-870MHz CDMA applications
Parameter Frequency Gain Noise Figure Input DC supply Current
Note 1: Test Conditions: Vdd=2.8V, Tc=25C, RF frequency=881MHz, CDMA High Gain state.
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TQ3132 Data Sheet
Electrical Characteristics
Parameter RF Frequency Conditions Min. 832 Typ/Nom 881 Max. 894 Units MHz
CDMA Mode-High Gain
Gain Noise Figure Input IP3 LNA IN Return Loss (with external matching) LNA OUT Return Loss Supply Current 6.0 10 10 7.5 9.5 10.5 13.0 1.4 8.0 1.7 dB dB dBm dB dB mA
Bypass Mode
Gain Noise Figure Input IP3 LNA IN Return Loss (with external matching) LNA OUT Return Loss Supply Current 20.0 10 10 1.0 2.5 -3.0 -2.0 2.0 25.0 3.0 dB dB dBm dB dB mA
AMPS Mode
Gain Noise Figure Input IP3 LNA IN Return Loss (with external matching) LNA OUT Return Loss Supply Current Supply Voltage
Note 1: Test Conditions: Vdd=2.8V, RF=881MHz, TC = 25 C, unless otherwise specified. Note 2: Min/Max limits are at +25C case temperature, unless otherwise specified.
8.5 2.0 10 10
11.0 1.6 4.0 2.4
dB dB dBm dB dB
4.5 2.7 2.8
5.5 3.3
mA V
Absolute Maximum Ratings
Parameter DC Power Supply Power Dissipation Operating Temperature Storage Temperature Signal level on inputs/outputs Voltage to any non supply pin Value 5.0 500 -30 to 85 -60 to 150 +20 +0.3 Units V mW C C dBm V
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TQ3132 Data Sheet
Typical Performance
Test Conditions, unless Otherwise Specified: Vdd=2.8V, Tc=+25C, RF=881MHz CDMA High Gain Mode Gain v Freq v Temp 15.0 14.5 14.0 13.5 13.0 12.5 12.0 11.5 11.0 10.5 10.0 860 870 880 Frequency (MHz) 890 10.00 9.00 8.00 Idd (mA) 7.00 6.00 5.00 4.00 900 2.5 2.7 2.9 3.1 3.3 3.5 Vdd (V)
-30C +25C +85C
CDMA High Gain Mode Idd v Vdd v Temp
Gain (dB)
-30C +25C +85C
CDMA High Gain Mode IIP3 v Freq v Temp 10.0 9.5 IIP3 (dBm) Gain (dB) 9.0 8.5 8.0 7.5 7.0 860 870 880 Frequency (MHz) 890 900
-30C +25C +85C
AMPS Mode Gain v Freq v Temp 14.0 13.5 13.0 12.5 12.0 11.5 11.0 10.5 10.0 9.5 9.0 860 870 880 Frequency (MHz) 890
-30C +25C +85C
900
CDMA High Gain Mode Noise Figure v Freq v Temp 2.00 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 860 870 880 Frequency (MHz) 890 10.0 9.0 8.0 IIP3 (dBm) 7.0 6.0 5.0 4.0 3.0 900 860 870
AMPS Mode IIP3 v Freq v Temp
Noise Figure (dB)
-30C +25C +85C
-30C +25C +85C
880 Frequency (MHz)
890
900
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TQ3132 Data Sheet
AMPS Mode Noise Figure v Freq v Temp 2.50 2.00 1.50 1.00 0.50 0.00 860 870 880 Frequency (MHz) 890 900
-30C +25C +85C
BYPASS Mode IIP3 v Freq v Temp 38.0 37.0 36.0 IIP3 (dBm) 35.0 34.0 33.0 32.0 31.0 30.0 860 870 880 Frequency (MHz) 890 900
-30C +25C +85C
Noise Figure (dB)
AMPS Mode Idd v Vdd v Temp 5.30 5.20 5.10 5.00 4.90 4.80 4.70 4.60 4.50 4.40 4.30 2.5 2.7 2.9 Vdd (V) 3.1 2.50 2.00 1.50 1.00 0.50 0.00 3.3 3.5 860
BYPASS Mode Noise Figure v Freq v Temp
Noise Figure (dB)
Idd (mA)
-30C +25C +85C
-30C +25C +85C
870
880 Frequency (MHz)
890
900
BYPASS Mode Gain v Freq v Temp 0.0 -0.5 Gain (dB) -1.0 -1.5 -2.0 -2.5 -3.0 860 870 880 Frequency (MHz) 890 900
-30C +25C +85C
BYPASS Mode Idd v Vdd v Temp 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 2.5 2.7 2.9 Vdd (V) 3.1
Idd (mA)
-30C +25C +85C
3.3
3.5
4
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TQ3132 Data Sheet
Application/Test Circuit
Vdd R1 Control Logic
C2 Vdd
C2
GND
(paddle)
GND
LNA input C1
L1
RF in
RF out C3
LNA output Control Logic
Lbrd
LNA GND
Bill of Material for TQ3132 LNA Application/Test Circuit
Component Receiver IC Capacitor Capacitor Resistor Inductor Inductor Reference Designator U1 C1 C2 R1 L1 Lbrd Part Number TQ3132 3pF 15pF 3.3 15nH See application note Value Size SOT23-8 0402 0402 0402 0402 Manufacturer TriQuint Semiconductor
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TQ3132 Data Sheet
TQ3132 Product Description
The TQ3132 is a miniature low noise amplifier in a small SOT23-8 package (2.9X2.8X1.14 mm) with operation at 2.8v. The LNA specs are designed to be compatible with IS-98 Interim Standard for Dual-Mode CDMA cellular systems. The LNA features excellent linearity with small current consumption in all modes. TQ3132 is configured in a cascode topology with switching circuitry for the various CDMA output levels. A bias control circuit sets the quiescent current for each mode and ensures peak performance over process and temperature.
C2 LNA Gain Select
Vdd_LNA C2
LNA_GS
C2
LNA_IN C1 L1
1 TQ3132 8 2 3 4 7 6 5
LNA_OUT
C3
LNA_MD
1
Switch Control
Bias Control
8
VDD
Shorted Board Inductor
Figure 2. TQ3132 Applications Circuit
GND 2 7 GND
Selecting the LNA Vdd Bypass Capacitor
A Vdd bypass capacitor is recommended close to pin 8. The Vdd bypass capacitor has the largest effect on the LNA output match. Because the input match affects the output match to some degree as well, the process of picking the bypass capacitor value involves some iteration. First, an input match is selected to give adequate gain and noise figure. Then the bypass capacitor is varied to give the best output match. TriQuint's evaluation board achieves a 2:1 VSWR with the selected tuning components which allows direct connection to the input of a SAW filter.
S6 LNA IN 3 S1 S2 6 LNA OUT
S3 LNA GND 4 S5
S4 5
C3 LNA Mode Select
Figure 1. TQ3132 Functional Block Diagram
LNA Input Matching Network
Only three external components are needed to tune the LNA (see Figure 2). The chip uses an external capacitor and inductor for the input match to pin 3. The output is internally matched to 50 ohms at pin 6. In the TQ3132 the matching network is in the signal path for all three modes: High Gain, AMPS, and Bypass. Therefore, some experimentation is required to find the matching network that provides a compromise between noise figure and gain for all 3 modes. One could take the values used on TriQuint's evaluation board as a starting point (see Figure 2). The input match will affect the output match to some degree as well, so S22 should be monitored.
Logic Control Functions
The control lines can be toggled between high and low levels using CMOS logic circuitry. A logic level high (C3) is applied to pin 5 to change bias state from CDMA to Amps modes. Similarly, a logic level high (C2) at pin 1 selects the gain step for the amplifier. In the high gain mode, switches S1, S2, and S5 are closed, with switches S3 and S4 open. In the bypass mode, switches S1, S2, and S5 are open, with switches S3 and S4 closed (see figure 1).
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TQ3132 Data Sheet
Table 1. TQ3132 Control lines C2, C3 TQ3132 LNA Mode C2 C3 found that setting the spectrum analyzer attenuator to 20dB allows for accurate measurement in that mode, and in all the other modes.
CDMA High Gain (HG) Bypassed AMPS
0 1 1 0
0 0 1 1
TQ3132 Noise and S-Parameters Data
The following noise and S-parameter data was obtained using TriQuint's evaluation board. This information is intended to be used as a guide to synthesize the LNA tuning network and find a compromise between noise figure and gain for all modes. Table 2. Gamma Opt analysis for TQ3132 High Gain Mode
Gain Control via Pin 4 Inductance
The source connection of the LNA cascode is brought out separately through pin 4. This allows external degeneration of the cascode by adding a small amount of PC board trace inductance to pin 4. Thus some increase in IIP3 can be made while reducing LNA gain. The total amount of inductance present at the source of the cascode is equal to the bond wire plus package plus external inductances. One should generally use an external inductance such that gain in the High Gain mode = 13.5dB. On the evaluation board the total PCB trace inductance at pin 4 is approximately 2.57nH. In order to achieve the desire gain, this board inductor should be shorted half way of its total length which is equivalent to about 1.55nH.
Freq (MHz) 700 880 1000
Opt 0.53 0.52 0.49
< Angle 32.8 41.5 42.6
Fmin (dB) 1.1 1.0 1.1
R noise 24.15 19.03 17.98
Table 3. Gamma Opt analysis for TQ3132 AMPS Mode Freq (MHz) 700 880 1000 Opt 0.62 0.56 0.53 < Angle 33.5 40.2 41.9 Fmin (dB) 1.3 1.2 1.3 R noise 33.5 26.4 25.1
Board Layout Recommendations
All ground pins should be kept close to the IC and have its own via to the ground plane to minimize inductance. Most PC boards for portable applications have thin dielectric layers and very narrow line width which increase the board parasitic capacitance and inductance. To minimize these effects when implementing a matching network, it is recommended to relieve the ground underneath pads carrying RF signals whenever possible.
RF input power levels for accurate test results
Because the CDMA devices have a number of gain states, it important to make sure that IP3 measurements are not taken in a state of compression. Additionally, using too low of a power puts the IMD products too close to the noise floor for accurate results. Additionally, the LNA in the bypass mode have OIP3 of around 30dBm, which is higher than the IIP3 of common spectrum analyzers in their preset configuration. We have
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TQ3132 Data Sheet
1.0 0.5 2.0
TQ3132 HG Noise Parameters
A
B C 0.5 1.0 2.0 A
0.53 @ 32.8 z = 1.84 + j 1.45 y = 0.33 - j 0.26 Freq=700MHz
B
0.52 @ 41.5 z = 1.49 + j 1.4 y = 0.36 - j 0.34 Freq=880MHz
C
-0.5 -1.0 -2.0
0.49 @ 42.6 z = 1.46 + j 1.29 y = 0.38 - j 0.34 Freq=1000MHz
Figure 3. TQ3132 CDMA High Gain Noise Parameters
1.0 0.5 2.0
TQ3132 AMPS Noise Parameters
A
B C 0.5 1.0 2.0 A
0.62 @ 33.5 z = 1.76 + j 1.95 y = 0.25 - j 0.28 Freq=700MHz
B
0.56 @ 40.2 z = 1.49 + j 1.6 y = 0.31 - j 0.33 Freq=880MHz
C
-0.5 -1.0 -2.0
0.53 @ 41.9 z = 1.46 + j 1.44 y = 0.35 - j 0.34 Freq=1000MHz
Figure 4. TQ3132 CDMA AMPS Noise Parameters
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TQ3132 Data Sheet
Package Pinout
C2
Control Logic C2
L1
VDD
GND
GND
RF IN
RF 50 ohm OUT RF Out Control Logic
GND
C3
Pin Descriptions
Pin Name C2 GND RF IN LNA GND C3 RF OUT LNA GND Vdd Pin # 1 2 3 4 5 6 7 8 Description and Usage Control logic 2 Ground, paddle RF input, off-chip matching required Ground, LNA Source ground Control logic 3 RF output, no matching required Ground LNA Vdd, typical 2.8V, C2 capacitor required
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TQ3132 Data Sheet
Package Type: SOT23-8 Plastic Package
Note 1
PIN 1 FUSED LEAD
b A c A1
E E1
Note 2
DIE
e
DESIGNATION A A1 b c D e E E1 L Theta
L
METRIC 1.20 +/-.25 mm .100 +/-.05 mm .365 mm TYP .127 mm TYP 2.90 +/-.10 mm .65 mm TYP 2.80 +/-.20 mm 1.60 +/-.10 mm .45 +/-.10 mm 1.5 +/-1.5 DEG
ENGLISH 0.05 +/-.250 in .004 +/-.002 in .014 in .005 in .114 +/-.004 in .026 in .110 +/-.008 in .063 +/-.004 in .018 +/-.004 in 1.5 +/-1.5 DEG NOTE 3 3 3 3 1,3 3 3 2,3 3
DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE
Notes 1. The package length dimension includes allowance for mold mismatch and flashing. 2. The package width dimension includes allowance for mold mismatch and flashing. 3. Primary dimensions are in metric millimeters. The English equivalents are calculated and subject to rounding error.
Additional Information
For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: info_wireless@tqs.com Tel: (503) 615-9000 Fax: (503) 615-8900
For technical questions and additional information on specific applications: Email: info_wireless@tqs.com
The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright (c) 2000 TriQuint Semiconductor, Inc. All rights reserved. Revision A, April, 2000
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